{"schema":"libjg2-1", "vpath":"/git/", "avatar":"/git/avatar/", "alang":"", "gen_ut":1755804159, "reponame":"openssl", "desc":"OpenSSL", "owner": { "name": "Andy Green", "email": "andy@warmcat.com", "md5": "c50933ca2aa61e0fe2c43d46bb6b59cb" },"url":"https://warmcat.com/repo/openssl", "f":3, "items": [ {"schema":"libjg2-1", "cid":"141a18162793bb6e024c3e6d5bfbed7d", "commit": {"type":"commit", "time": 1450105729, "time_ofs": 60, "oid_tree": { "oid": "549d71385e938f4f8c913fddd9cfafb4249a1b72", "alias": []}, "oid":{ "oid": "2688d99989902dea884632a8658f3abad0c26d16", "alias": []}, "msg": "crypto/ppccap.c: add SIGILL-free processor capability detection code.", "sig_commit": { "git_time": { "time": 1450105729, "offset": 60 }, "name": "Andy Polyakov", "email": "appro@openssl.org", "md5": "50bd64fa2a792cbbf679fa16213a3b2a" }, "sig_author": { "git_time": { "time": 1447456219, "offset": 60 }, "name": "Andy Polyakov", "email": "appro@openssl.org", "md5": "50bd64fa2a792cbbf679fa16213a3b2a" }}, "body": "crypto/ppccap.c: add SIGILL-free processor capability detection code.\n\nReviewed-by: Kurt Roeckx \u003ckurt@openssl.org\u003e\n" , "diff": "diff --git a/crypto/ppc_arch.h b/crypto/ppc_arch.h\nindex b50ec99..c0b4f18 100644\n--- a/crypto/ppc_arch.h\n+++ b/crypto/ppc_arch.h\n@@ -3,8 +3,14 @@\n \n extern unsigned int OPENSSL_ppccap_P;\n \n+/*\n+ * Flags' usage can appear ambiguous, because they are set rather\n+ * to reflect OpenSSL performance preferences than actual processor\n+ * capabilities.\n+ */\n # define PPC_FPU64 (1\u003c\u003c0)\n # define PPC_ALTIVEC (1\u003c\u003c1)\n # define PPC_CRYPTO207 (1\u003c\u003c2)\n+# define PPC_FPU (1\u003c\u003c3)\n \n #endif\ndiff --git a/crypto/ppccap.c b/crypto/ppccap.c\nindex 74af473..c8d012e 100644\n--- a/crypto/ppccap.c\n+++ b/crypto/ppccap.c\n@@ -7,6 +7,12 @@\n #if defined(__linux) || defined(_AIX)\n # include \u003csys/utsname.h\u003e\n #endif\n+#if defined(_AIX53) /* defined even on post-5.3 */\n+# include \u003csys/systemcfg.h\u003e\n+# if !defined(__power_set)\n+# define __power_set(a) (_system_configuration.implementation \u0026 (a))\n+# endif\n+#endif\n #include \u003copenssl/crypto.h\u003e\n #include \u003copenssl/bn.h\u003e\n \n@@ -79,10 +85,37 @@ static void ill_handler(int sig)\n siglongjmp(ill_jmp, sig);\n }\n \n+void OPENSSL_fpu_probe(void);\n void OPENSSL_ppc64_probe(void);\n void OPENSSL_altivec_probe(void);\n void OPENSSL_crypto207_probe(void);\n \n+/*\n+ * Use a weak reference to getauxval() so we can use it if it is available\n+ * but don't break the build if it is not. Note that this is *link-time*\n+ * feature detection, not *run-time*. In other words if we link with\n+ * symbol present, it's expected to be present even at run-time.\n+ */\n+#if defined(__GNUC__) \u0026\u0026 __GNUC__\u003e\u003d2 \u0026\u0026 defined(__ELF__)\n+extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));\n+#else\n+static unsigned long (*getauxval) (unsigned long) \u003d NULL;\n+#endif\n+\n+/* I wish \u003csys/auxv.h\u003e was universally available */\n+#define HWCAP 16 /* AT_HWCAP */\n+#define HWCAP_PPC64 (1U \u003c\u003c 30)\n+#define HWCAP_ALTIVEC (1U \u003c\u003c 28)\n+#define HWCAP_FPU (1U \u003c\u003c 27)\n+#define HWCAP_POWER6_EXT (1U \u003c\u003c 9)\n+#define HWCAP_VSX (1U \u003c\u003c 7)\n+\n+#define HWCAP2 26 /* AT_HWCAP2 */\n+#define HWCAP_VEC_CRYPTO (1U \u003c\u003c 25)\n+\n+# if defined(__GNUC__) \u0026\u0026 __GNUC__\u003e\u003d2\n+__attribute__ ((constructor))\n+# endif\n void OPENSSL_cpuid_setup(void)\n {\n char *e;\n@@ -94,16 +127,6 @@ void OPENSSL_cpuid_setup(void)\n return;\n trigger \u003d 1;\n \n- sigfillset(\u0026all_masked);\n- sigdelset(\u0026all_masked, SIGILL);\n- sigdelset(\u0026all_masked, SIGTRAP);\n-#ifdef SIGEMT\n- sigdelset(\u0026all_masked, SIGEMT);\n-#endif\n- sigdelset(\u0026all_masked, SIGFPE);\n- sigdelset(\u0026all_masked, SIGBUS);\n- sigdelset(\u0026all_masked, SIGSEGV);\n-\n if ((e \u003d getenv(\u0022OPENSSL_ppccap\u0022))) {\n OPENSSL_ppccap_P \u003d strtoul(e, NULL, 0);\n return;\n@@ -112,6 +135,8 @@ void OPENSSL_cpuid_setup(void)\n OPENSSL_ppccap_P \u003d 0;\n \n #if defined(_AIX)\n+ OPENSSL_ppccap_P |\u003d PPC_FPU;\n+\n if (sizeof(size_t) \u003d\u003d 4) {\n struct utsname uts;\n # if defined(_SC_AIX_KERNEL_BITMODE)\n@@ -121,7 +146,69 @@ void OPENSSL_cpuid_setup(void)\n if (uname(\u0026uts) !\u003d 0 || atoi(uts.version) \u003c 6)\n return;\n }\n+\n+# if defined(__power_set)\n+ /*\n+ * Value used in __power_set is a single-bit 1\u003c\u003cn one denoting\n+ * specific processor class. Incidentally 0xffffffff\u003c\u003cn can be\n+ * used to denote specific processor and its successors.\n+ */\n+ if (sizeof(size_t) \u003d\u003d 4) {\n+ /* In 32-bit case PPC_FPU64 is always fastest [if option] */\n+ if (__power_set(0xffffffffU\u003c\u003c13)) /* POWER5 and later */\n+ OPENSSL_ppccap_P |\u003d PPC_FPU64;\n+ } else {\n+ /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */\n+ if (__power_set(0x1U\u003c\u003c14)) /* POWER6 */\n+ OPENSSL_ppccap_P |\u003d PPC_FPU64;\n+ }\n+\n+ if (__power_set(0xffffffffU\u003c\u003c14)) /* POWER6 and later */\n+ OPENSSL_ppccap_P |\u003d PPC_ALTIVEC;\n+\n+ if (__power_set(0xffffffffU\u003c\u003c16)) /* POWER8 and later */\n+ OPENSSL_ppccap_P |\u003d PPC_CRYPTO207;\n+\n+ return;\n+# endif\n+#endif\n+\n+ if (getauxval !\u003d NULL) {\n+ unsigned long hwcap \u003d getauxval(HWCAP);\n+\n+ if (hwcap \u0026 HWCAP_FPU) {\n+\t OPENSSL_ppccap_P |\u003d PPC_FPU;\n+\n+ if (sizeof(size_t) \u003d\u003d 4) {\n+ /* In 32-bit case PPC_FPU64 is always fastest [if option] */\n+ if (hwcap \u0026 HWCAP_PPC64)\n+ OPENSSL_ppccap_P |\u003d PPC_FPU64;\n+ } else {\n+ /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */\n+ if (hwcap \u0026 HWCAP_POWER6_EXT)\n+ OPENSSL_ppccap_P |\u003d PPC_FPU64;\n+ }\n+ }\n+\n+ if (hwcap \u0026 HWCAP_ALTIVEC) {\n+ OPENSSL_ppccap_P |\u003d PPC_ALTIVEC;\n+\n+ if ((hwcap \u0026 HWCAP_VSX) \u0026\u0026 (getauxval(HWCAP2) \u0026 HWCAP_VEC_CRYPTO))\n+ OPENSSL_ppccap_P |\u003d PPC_CRYPTO207;\n+ }\n+\n+ return;\n+ }\n+\n+ sigfillset(\u0026all_masked);\n+ sigdelset(\u0026all_masked, SIGILL);\n+ sigdelset(\u0026all_masked, SIGTRAP);\n+#ifdef SIGEMT\n+ sigdelset(\u0026all_masked, SIGEMT);\n #endif\n+ sigdelset(\u0026all_masked, SIGFPE);\n+ sigdelset(\u0026all_masked, SIGBUS);\n+ sigdelset(\u0026all_masked, SIGSEGV);\n \n memset(\u0026ill_act, 0, sizeof(ill_act));\n ill_act.sa_handler \u003d ill_handler;\n@@ -130,19 +217,24 @@ void OPENSSL_cpuid_setup(void)\n sigprocmask(SIG_SETMASK, \u0026ill_act.sa_mask, \u0026oset);\n sigaction(SIGILL, \u0026ill_act, \u0026ill_oact);\n \n- if (sizeof(size_t) \u003d\u003d 4) {\n+ if (sigsetjmp(ill_jmp,1) \u003d\u003d 0) {\n+ OPENSSL_fpu_probe();\n+ OPENSSL_ppccap_P |\u003d PPC_FPU;\n+\n+ if (sizeof(size_t) \u003d\u003d 4) {\n #ifdef __linux\n- struct utsname uts;\n- if (uname(\u0026uts) \u003d\u003d 0 \u0026\u0026 strcmp(uts.machine, \u0022ppc64\u0022) \u003d\u003d 0)\n+ struct utsname uts;\n+ if (uname(\u0026uts) \u003d\u003d 0 \u0026\u0026 strcmp(uts.machine, \u0022ppc64\u0022) \u003d\u003d 0)\n #endif\n- if (sigsetjmp(ill_jmp, 1) \u003d\u003d 0) {\n- OPENSSL_ppc64_probe();\n- OPENSSL_ppccap_P |\u003d PPC_FPU64;\n- }\n- } else {\n- /*\n- * Wanted code detecting POWER6 CPU and setting PPC_FPU64\n- */\n+ if (sigsetjmp(ill_jmp, 1) \u003d\u003d 0) {\n+ OPENSSL_ppc64_probe();\n+ OPENSSL_ppccap_P |\u003d PPC_FPU64;\n+ }\n+ } else {\n+ /*\n+ * Wanted code detecting POWER6 CPU and setting PPC_FPU64\n+ */\n+ }\n }\n \n if (sigsetjmp(ill_jmp, 1) \u003d\u003d 0) {\n","s":{"c":1755804159,"u": 2491}} ],"g": 4538,"chitpc": 0,"ehitpc": 0,"indexed":0 , "ab": 0, "si": 0, "db":0, "di":0, "sat":0, "lfc": "0000"}