{"schema":"libjg2-1", "vpath":"/git/", "avatar":"/git/avatar/", "alang":"", "gen_ut":1752654090, "reponame":"openssl", "desc":"OpenSSL", "owner": { "name": "Andy Green", "email": "andy@warmcat.com", "md5": "c50933ca2aa61e0fe2c43d46bb6b59cb" },"url":"https://warmcat.com/repo/openssl", "f":3, "items": [ {"schema":"libjg2-1", "cid":"e0dd0a160a2584a5e68f285c9622bdc4", "commit": {"type":"commit", "time": 1523179102, "time_ofs": 120, "oid_tree": { "oid": "98c11b64b8776a5cbff8f4e006f158a063342315", "alias": []}, "oid":{ "oid": "e14795f83bd99b7df6305e411d4b6c52bdd98938", "alias": []}, "msg": "config: fix hpux64-parisc2-gcc detection.", "sig_commit": { "git_time": { "time": 1523179102, "offset": 120 }, "name": "Andy Polyakov", "email": "appro@openssl.org", "md5": "50bd64fa2a792cbbf679fa16213a3b2a" }, "sig_author": { "git_time": { "time": 1521921249, "offset": 60 }, "name": "Andy Polyakov", "email": "appro@openssl.org", "md5": "50bd64fa2a792cbbf679fa16213a3b2a" }}, "body": "config: fix hpux64-parisc2-gcc detection.\n\nhpux64-parisc2-gcc is chosen based on gcc's bitness, and it was overriden\nunconditionally.\n\nReviewed-by: Richard Levitte \u003clevitte@openssl.org\u003e\n(Merged from https://github.com/openssl/openssl/pull/5742)\n" , "diff": "diff --git a/config b/config\nindex ce99302..a44cd21 100755\n--- a/config\n+++ b/config\n@@ -760,7 +760,11 @@ case \u0022$GUESSOS\u0022 in\n \t OUT\u003d\u0022hpux-ia64-cc\u0022\n fi\n \telif [ $CPU_VERSION -ge 532 ]; then\t# PA-RISC 2.x CPU\n-\t OUT\u003d${OUT:-\u0022hpux-parisc2-${CC}\u0022}\n+\t # PA-RISC 2.0 is no longer supported as separate 32-bit\n+\t # target. This is compensated for by run-time detection\n+\t # in most critical assembly modules and taking advantage\n+\t # of 2.0 architecture in PA-RISC 1.1 build.\n+\t OUT\u003d${OUT:-\u0022hpux-parisc1_1-${CC}\u0022}\n \t if [ $KERNEL_BITS -eq 64 -a \u0022$CC\u0022 \u003d \u0022cc\u0022 ]; then\n \t\techo \u0022WARNING! If you wish to build 64-bit library then you have to\u0022\n \t\techo \u0022 invoke '$THERE/Configure hpux64-parisc2-cc' *manually*.\u0022\n@@ -769,11 +773,6 @@ case \u0022$GUESSOS\u0022 in\n \t\t (trap \u0022stty `stty -g`; exit 0\u0022 2 0; stty -icanon min 0 time 50; read waste) \u003c\u00261\n \t\tfi\n \t fi\n-\t # PA-RISC 2.0 is no longer supported as separate 32-bit\n-\t # target. This is compensated for by run-time detection\n-\t # in most critical assembly modules and taking advantage\n-\t # of 2.0 architecture in PA-RISC 1.1 build.\n-\t OUT\u003d\u0022hpux-parisc1_1-${CC}\u0022\n \telif [ $CPU_VERSION -ge 528 ]; then\t# PA-RISC 1.1+ CPU\n \t OUT\u003d\u0022hpux-parisc1_1-${CC}\u0022\n \telif [ $CPU_VERSION -ge 523 ]; then\t# PA-RISC 1.0 CPU\n","s":{"c":1752654090,"u": 35290}} ],"g": 36728,"chitpc": 0,"ehitpc": 0,"indexed":0 , "ab": 0, "si": 0, "db":0, "di":0, "sat":0, "lfc": "0000"}